Office phone: (413) 545-0923
Home phone: (413) 549-8150

Hi there! My name is Raksit. I was brought up in the absolutely wonderful University town of Roorkee. I did most of my schooling here before moving to Swaziland (aka the Switzerland of Africa!). Some more schooling followed by under-graduate studies in the University of Swaziland and I was an Engineer! (B.Engg. in Electronics & Communications June 2000). Destiny brought me then to the University of Massachusetts, Amherst in the US of A, where I am pursuing the M.S.E.C.E. (Master of Science Electrical & Computer Engineering) degree program. I work in the Software Systems & Architectures lab under Prof. Csaba Andras Moritz's supervision. Expect to be completing sooooon!! (August 2002).

Compiler-Enabled Memory Systems

Traditional memory systems suffer from a certain degree of redundancy because of the general one-size-fits-all approach (e.g. doing a TLB lookup followed by associative cache lookup for each memory access is wasteful both energy- and performance-wise). We propose and evaluate a compiler-enabled memory system framework that leverages static program information (i.e., compile-time information) about memory access types and patterns, to reduce some of the aforementioned redundancy. We have used the SUIF/MachSUIF compiler infrastructure for doing the compiler analyses. For performance and energy evaluation, we run the binaries generated by MachSUIF on the execution-driven SimpleScalar/Wattch simulator, which models an Alpha processor with our proposed extensions. This research has so far resulted in publications in premier conferences on Architecture (IEEE Micro 2001 and ACM ASPLOS 2002; see below).

Fine-Grain Synchronization for Multiprocessors

Ever-increasing multiplicity in modern multiprocessor systems has prompted researchers to explore new ways for making programs highly concurrent to better exploit the offered capability. Efficient support for synchronization is set to become a key challenge to allow scalability. Performance results of machines supporting fine-grain synchronization, like the Alewife multiprocessor, have demonstrated the benefits of fine-grain synchronization over conventional coarse-grain synchronization.
The Alewife machine implements fine-grain synchronization as a separate layer above the cache-coherence protocol. We on the other hand, propose integrating fine-grain synchronization support in the cache-coherence layer itself. We believe that this streamlined solution can further increase performance in addition to reducing network traffic (because we eliminate the inter-layer messages required if fine-grain synchronization and cache-coherence were implemented as two separate layers). To evaluate this proposal, we are currently extending the SimpleScalar simulator to support multiprocessing/multithreading.

Publications

Raksit Ashok, Saurabh Chheda, Csaba Andras Moritz  (.ps)  (.pdf)
Cool-Mem: Combining Statically Speculative and Conventional Memory Accessing for Energy Efficiency, To Appear in the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2002).

Osman S. Unsal, Raksit Ashok, Israel Koren, C. Mani Krishna, Csaba Andras Moritz  (.ps)  (.pdf)
Cool-Cache for Hot Multimedia, Appears in the IEEE International Symposium on Microarchitecure (MICRO-34), Dec.2001

Raksit Ashok, Osman S. Unsal, Vijaya R. Lakamraju, Csaba Andras Moritz  (.ps)  (.pdf)
Network Software: From NCP To Ubiquitious Computing, To appear in the Encyclopedia Of Life Support Systems, 2001

Raksit Ashok, Diganta Roychowdhury, Csaba Andras Moritz  (.ps)  (.pdf)
Synchronization Coherence Protocols: Unifying Synchronization and Caching in Multiprocessors, UMass Technical Report.

Fall 2000: Computer Architecture, Software Exposed Architectures, Compiler Design

Spring 2001: Distributed Operating Systems, Intelligent Systems

Fall 2001: Advanced Algorithms, Parallel Computer Architecture

Spring 2002: Digital Computer Arithmetic

Teaching Assistant (Spring '01 and '02): CS377 Operating systems.
Was responsible for designing and grading the programming projects in JAVA (multithreaded client-servers using RMI, etc) and helping students on the projects and other course-work.

Teaching Assistant (Spring '02 and Summer '02): ECE669 Parallel Computer Architecture (Off-Campus course)
Was responsible for grading and helping the off-campus students with course-related problems.