Miguel Alvarado
ECE 658: Lab 1

Load Capacitance:

Cinv     = Cp + Cn

= Cox*L*(Wn+Wp)
            = (6.03 fF/um2)*(.24 um)*(.36 um + 1.08 um)
            = 2.08 fF

Cload = 32 * Cinv + 100 fF
          = (32 * 2.08 fF) + 100 fF
          = 166.56 fF

Parasitic Capacitance:
Cpara = (3*Cgdo*Wn) + 3[Cj*Wn*Ls + Cjsw(2*Ls + Wn)] +  (2*Cgdo*Wp) + 2[Cj*Wp*Ls + Cjsw(2*Ls + Wp)]

= (3*.63Wn) + 3[1.92*Wn*.72 + .44(2*.72 + Wn)] + (2*.56Wp) + 2[1.88*Wp*.72 + .37(2*.72 + Wp)]

            = 7.36Wn + 1.90 + 4.57Wp + 1.07

            = 7.36Wn + 4.57 Wp + 2.97

 

Ctotal = Cpara + Cload
          = 7.36Wn + 4.57 Wp + 2.97 + 166.56
          = 7.36Wn + 4.57 Wp + 169.53 [fF]

Total current to switch Capacitance:

      I     = Ctotal * dV/dt
            = (7.36Wn + 4.57Wp + 169.53)fF * (1.25 V/300 ps)
            = (3.07e-5)Wn + (1.9e-5)Wp + 7.06e-4

Current in NMOS for worst-case FALLING edge OUT

     I      = (kn'/2) * (Wn/2L) * (Vgs -Vt)2
            = .5*(275e-6)*(Wn/.48)(2.5 - .43)2
            = (1.23e-3)Wn


Current in PMOS for worst-case RISING edge on OUT     

    I       = (kp'/2) * (Wp/L) * (Vgs -Vt)2
            = .5*(96e-6)*(Wp/.24)*(2.5 -.62)2
            = 7.07e-4Wp  

(3.07e-5)Wn + (1.9e-5)Wp + 7.06e-4 = (1.23e-3)Wn

(1.2e-3)Wn - (1.9e-5)Wp = 7.06e-4                           ->Equation 1


(3.07e-5)Wn + (1.9e-5)Wp + 7.06e-4 = (7.07e-4)Wp

(6.88e-4)Wp - (3.07e-5)Wn = 7.06e-4                       ->Equation 2

Solving for the two above equations, yields Wn= 0.6um and Wp= 1.08um

Now Calculating Power

Static Power

        Pstat     = I stat * Vdd                                    (Equation 5.52 in RCN text page 223)
                     = (10-100 pA/μm2)(16.704 μm2)(2.5)
                     = range from 4.176 E-10 W to 4.176 E-9 W

The static power is the power that occurs when no switching is taking place, so this should be very low. Using the finalized values of Wn and Wp an area of 16.704 was μm2 obtained, Istat was obtained from RCN in the range shown above, therefore the worse case static power is also in a range.

Dynamic Power


Pdyn    = Cload*Vdd2 * f 0 ->1                  (Equation 5.42 in RCN text)
            = 166.56 fF * (2.5)2* (1/300 ps)
            = 3.47 mW


The total power dissipation is dominated by the capacitive dissipation, there is however another type of power that adds to the power dissipation. That is the direct-path power dissipation which is proportional to the switching activity, which is usually in the μW, and thus dominated by the mW power obtained in the dynamic power.

**Note: These hand calculations are very inaccurate for many reasons, for one the values used to represent the model may not be accurate based on the model used in Cadance. Also the current equations are really not accurate and are quite idealistic in terms of performance for this gate, so this would also lead to incorrect values for Wn and Wp. Therefore as suggested by the TA I will only compare the simulated values vs the requirements of lab1 since the comparing these hand calculations to the simulated values would be pointless since the Wn and Wp are far off, except for static power where i put realistic values.

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Miguel Alvarado; Fall 2004