Design of a Voltage Controlled Oscillator (VCO) based on a Ring Oscillator Topology with Differential Elements

2.2 Design of a VCO Based on Ring Oscillator Topology Using  Starved-Current Elements.

Figure 2.2.1 presents the schematic of a VCO based on ring oscillator topology using five starved-current elements. The transistors M1, M2, M11 and M16 represent one delay element of the ring oscillator. Transistors M2 and M11 operate as an inverter and M1 and M16 operate as current sources. The current sources, M1 and M16 limit the current available to the inverter, M2 and M11. The drain currents in M0 and M21  are the same and are controlled by the input control voltage Vc.  The currents in M0 and M21 are mirrored in each inverter/current source stage.

starved

Figure 2.2.1 A VCO using five starved-current elements.

Design equations

Figure 2.2.2 presents the simplified schematic of one stage of the VCO. The total capacitance on the drains of M2 and M11 can be expressed as:

Ctot = Cout + Cin                                                                                (2.2.1)

design



Figure 2.2.2 Simplified model of a single stage of the VCO.

For a minimum size inverter the value of Ctot can be expressed as:

Ctot = Cox L (Wp +Wn) + 2Cdbp +2Cgdp + Cdbn +2Cgdn

       = Cox L (Wp +Wn) + 2[WpLsCjp+(2Ls+Wp)Cjswp] + 2CgdopWp +  [WnLsCjn+(2Ls+Wn)Cjswn]+ 2CgdnoWn

Ctot = 2.0389 + 8.198 = 10.298 fF

Knowing the value of Ctot and the number of stages N, the center frequency of the current-starved VCO can be estimated using equation 2.2.2 [Jacob], for the particular case when Id = Idcenter (current when control voltage is Vdd/2).

fout = Id/(N Ctot Vdd)                                                                              (2.2.2)

The maximum oscillation frequency is determined by finding  Id when  the control voltage is Vdd.


Design Example

Suppose that we wanted to design a VCO using five starved-current elements, with a fout =1.0 GHz, the current needed to generate this oscillation is:

Id = fosc N Vdd Ctot = kn’ (W/L) [(Vgs-Vtn)Vdsat-Vdsat^2/2]

From last expression, the size of transistor M21 can be calculated using the following expression:

Wn=  (fosc N Vdd Ctot L) / (kn’[(Vgs-Vtn)Vdsat-Vdsat^2/2])

      =  (1 G)5 (2.5) (10.3 f) (0.24 u)/ (116E-6[(1.25-0.46)0.6-0.6^2/2])

      = 0.84 um

Using a value of Wn=0.9 um, the schematic of the VCO with five starved-current elements is presented in figure 2.2.1 Figure 2.2.3 presents the output frequency fout as function of the control voltage Vc.

fout_vs_Vc

Figure 2.2.3 fout  as a function of Vc

fout was estimated using the Fast Fouried Transform (FFT) from HSPICE. From this plot it is observed that, in general fout is not a linear function of Vc. However, we can set a region where fout is a linear function of Vc. For example, from Vc = 1.8 V to 2.5 V fout is a linear function of its control voltage Vc. Due to that, the tuning sensitivity  (change in output frequency per unit change in the control voltage) of this VCO can be given as a minimum and maximum value or give several values. For example, there exist a tuning sensitivity of 65 MHz/V if Vc changes from 1.8 V to 2.5 V, a tuning sensitivity of 325 MHz/V if Vc changes from 1.2 V to 1.6 V and a sensitivity of 1123 MHz/V if Vc changes from 0.8 V to 1.2 V.
The time domain of the VCO-output  when Vc= 1V is presented in figures 2.2.4. Moreover, the spetrum of the oscillator for  Vc= 1.0 V and Vc= 2.5 V is presented in figure 2.2.5 and 2.2.6, respectively.


time_dom_star

Figure 2.2.4 Time domain response of VCO output, when Vc= 1.0 V


freq_dom

Figure 2.2.5 Frequency domain response of VCO output, when Vc= 1.0 V


1GHz_freq_dom

Figure 2.2.6 Frequency domain response of VCO output, when Vc= 2.5 V